1. Technical Field
The present invention relates to a semiconductor memory apparatus, and more particularly, to a data output circuit and method for a semiconductor memory apparatus.
2. Related Art
A semiconductor memory apparatus according to the related art having the configuration shown in FIG. 1 has first to third unit data output modes (hereinafter, referred to as an X32 mode, an X16 mode, and an X8 mode) in which the number of data bits output according to a one-time read command are 32, 16, and 8, respectively.
The semiconductor memory apparatus according to the related art shown in FIG. 1 includes a memory bank 10, a plurality of data lines GIO<0> to GIO<31>, a data output unit 20, and a pad unit 30. The memory bank 10 includes cell array 11 and a sense amplifier array 12 that includes a plurality of data bus sense amplifiers (hereinafter, simply referred to as sense amplifier), the plurality of data lines GIO<0> to GIO<31> corresponding to the respective sense amplifiers of the sense amplifier array 12 such that cell data inside the memory bank 10 corresponding to a row address and a column address is output to the outside of the memory bank 100, the data output unit 20 stores or drives the data of the data lines GIO<0> to GIO<31> so as to be output to the outside of the semiconductor memory apparatus, and the pad unit 30 has thirty-two pads that output the data driven by the data output unit 20 to the outside of the semiconductor memory apparatus.
The plurality of data lines GIO<0> to GIO<31> correspond to the zero to thirty-first pads of the pad unit 30 through the data output unit 20, respectively.
Further, all of the thirty-two pads are used when the semiconductor memory apparatus operates in the X32 mode, sixteen pads are used when the semiconductor memory apparatus operates in the X16 mode, and eight pads are used when the semiconductor memory apparatus operates in the X8 mode. Accordingly, the thirty-two pads may be divided into pads used only in the X32 mode, pads commonly-used in both the X32 mode and the X16 mode, and pads commonly used in all of the X32 mode, the X16 mode, and the X8 mode, which is determined in advance when designing the semiconductor memory apparatus.
The sense amplifiers of the sense amplifier array 12 are disposed in a repeating pattern in the order of a sense amplifier DBSA_X8, a sense amplifier DBSA_X32, a sense amplifier DBSA_X16, and a sense amplifier DBSA_X32, as shown in FIG. 1.
The sense amplifier DBSA_X8 operates in the X32 mode, the X16 mode, and the X8 mode, the sense amplifier DBSA_X32 operates only in the X32 mode, and the sense amplifier DBSA_X16 operates in both the X32 mode and the X16 mode.
When the semiconductor memory apparatus operates in the X32 mode, all of the sense amplifiers of the sense amplifier array 12 operate, and the data is outputted through the data lines GIO<0> to GIO<31> corresponding to the sense amplifiers.
When the semiconductor memory apparatus operates in the X16 mode, all of the sense amplifiers DBSA_X8 and DBSA_X16 of the sense amplifier array 12 operate, and the data is output through the data lines GIO<0>, GIO<2>, GIO<28>, GIO<29>, and GIO<30> corresponding to the sense amplifiers.
When the semiconductor memory apparatus operates in the X8 mode, all of the sense amplifiers DBSA_X8 of the sense amplifier array 12 operate, and the data is output through the data lines GIO<0>, GIO<4>, . . . , and GIO<28> corresponding to the sense amplifiers.
However, the sense amplifiers that detect and amplify data in cells corresponding to the row address and the column address do not completely match with the sense amplifiers corresponding to the X32 mode, the X16 mode, and the X8 mode.
For example, when the semiconductor memory apparatus operates in the X8 mode, first bit data among eight-bit data needs to be output through the data line GIO<0>.
However, when one of the sense amplifiers that detects and amplifies data in cells corresponding to the row address and the column address is a sense amplifier DBSA_X32 that is coupled to data buses Lio<1> and Liob<1> inside the memory bank, data cannot be output in a normal state.
For this reason, according to the related art as shown in FIG. 1, the local data bus lines ldb_X16<1>, ldb_X16<3>, and ldb_X8<1:3> are coupled to the sense amplifiers that are coupled to the GIO lines and used in respective modes including the X32 mode, the X16 mode, and the X8 mode, such that the data is transmitted to the sense amplifiers.
Accordingly, when the semiconductor memory apparatus operates in the X8 mode, even if the sense amplifier that senses and amplifies the data in the cells corresponding to the row address and the column address corresponds to any one of the sense amplifiers DBSA_X8, DBSA_X32, DBSA_X16, and DBSA_X32, the corresponding data is transmitted to the sense amplifier DBSA_X8, and the data can be output in a normal state.
By the same principle, even when the semiconductor memory apparatus operates in the X16 mode, data can be normally output to the sense amplifiers DBSA_X8 and DBSA_X16 by the local data bus lines ldb_X16<1> and ldb_X16<3>.
However, the semiconductor memory apparatus according to the related art that is used in each of the X32 mode, the X16 mode, and the X8 mode has the following problems.
First, in order to transmit the data among the sense amplifiers used in the respective X32, X16, and X8 modes, the local data bus lines are coupled to the sense amplifiers. As a result, a layout area is increased, and it becomes difficult to design a circuit. This problem may become intensified as a memory capacity is increased.
Second, since it takes time for the data to be transmitted through the local data bus lines coupled among the sense amplifiers; a data output time is increased.